Description:
The CD4011B is a standard CMOS logic gate that implements the NAND logic function. This device provides system designers with an efficient and straightforward solution for implementing the NAND gate function, complementing the existing CMOS gate family. The CD4011B features buffered inputs and outputs for enhanced performance and reliability, ensuring that the system operates with minimized delay and improved response times.
The CD4011B is available in a variety of package options, making it suitable for a wide range of applications and system designs.
Key Features:
Propagation Delay Time: 60 ns (typical) at CL = 50 pF, VDD = 10 V
Buffered Inputs and Outputs for improved performance
Symmetrical Output Characteristics for standardized performance
Low Input Current: Max 1 µA at 18 V across the full temperature range; 100 nA at 18 V at 25°C
Tested Quiescent Current at 20 V
Operates at 5 V, 10 V, and 15 V parametric ratings
Noise Margins:
1 V at VDD = 5 V
2 V at VDD = 10 V
2.5 V at VDD = 15 V
Complies with JEDEC Tentative Standard No. 13B for CMOS devices
Channels: 4
Inputs per Channel: 2
Low Power Consumption and high-speed performance
Specifications:
Part Number: CD4011B
Technology Family: CD4000
VCC (Min): 3 V
VCC (Max): 18 V
Channels: 4
Inputs per Channel: 2
IOL (Max): 6.8 mA
IOH (Max): -6.8 mA
Input Type: Standard CMOS
Output Type: Push-Pull
Speed: Standard Speed (tpd > 50 ns)
Data Rate (Max): 8 Mbps
Operating Temperature Range: -55°C to 125°C
Package Options:
Hermetic Dual-in-Line Ceramic Packages (F3A suffix)
Dual-in-Line Plastic Packages (E suffix)
Small-Outline Packages (M, MT, M96, and NSR suffixes)
Thin Shrink Small-Outline Packages (PWR and PW suffixes)
Disclaimer:
Product specifications, features, and design may change over time due to product updates or improvements.
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